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Module electronics

SunSolve Yield models the full electrical behaviour of photovoltaic modules using a physically based circuit approach. Each solar cell is represented by a one-diode equivalent circuit, connected in a network that replicates the module’s true electrical layout — including series and parallel strings, interconnects, and optional bypass diodes. The light-generated current for every cell is derived from the ray-traced optical absorption, and temperature-dependent electrical parameters are solved at each time step to determine current–voltage (IV) characteristics and module output. This approach provides a consistent, physics-based link between optical, thermal, and electrical domains within the simulation.

This page focuses on how SunSolve Yield connects and solves cell models at the module level (strings, interconnects, and bypass diodes). The underlying solar cell equivalent circuit model, including assumptions and governing equations, is documented separately in Equivalent circuit model.

The module circuit comprises an array of ‘connectors’ and ‘cell strings’ joined via a matrix of node points (see figures below).

The connectors define how cell strings are joined together and may be one of four types:

  • Open-circuit: no current will flow through the connector and the nodes on either side are electrically isolated.

  • Short-circuit: a lossless connection (i.e. resistance = 0 Ω) through which current may flow between adjacent nodes.

  • Bypass diode: a single SPICE diode as described below, the diode may face either direction.

  • Module terminal: the end points of the module circuit that connect it to the external load, each panel must have one positive and one negative terminal.

A cell string contains one or more solar cell equivalent circuits connected from positive terminal to negative terminal. The cells may be arranged such that under illumination the current flows in either direction through the string.

There are three different circuit layouts implemented:

  • Traditional c-Si: alternating rows of ‘connectors’ and ‘cell strings’. This model can be configured to match a wide variety of c-Si PV modules.

  • Odd columns with return path: an odd number of cell string columns with an extra column that contains a return path (implemented as a short circuit). This is used to model panels with the larger half-cut cell size.

  • Horizontal string: two columns of ‘connectors’ with a single column of parallel ‘cell strings’ in the middle. This layout is more commonly used by thin film modules such as the FirstSolar CdTe products.

The traditional c-Si layout is shown below it comprises of alternating rows of connectors and cell strings. A minimum of one cell string with four connectors is required. More cell strings can be added in both the X and Y directions. For each new column added a new set of connectors is added to each row. Note that many of the outer connectors are typically set to open-circuit.

Generic circuit layout for the ‘Traditional c-Si’ option. Matrix comprises of alternating rows of connectors and cell strings.

Two examples of traditional c-Si module circuits are shown below. Both feature sets of parallel strings of cells connected with three bypass diodes.

Example module circuits for the ‘Traditional c-Si’ option.

The horizontal strings layout is shown below, it comprises of two columns of connectors and a middle column of parallel cell strings. A minimum of one string with a pair of connectors (module terminals) is required. New parallel cell strings with a pair of connectors (short circuit) may be added as new rows.

Generic circuit layout for the ‘Horizontal strings’ option. Matrix comprises of two columns of connectors and a middle column of parallel cell strings.

Example module circuits for the ‘Horizontal strings’ option. In this case there are three parallel strings each with 268 cells in series.

There are two models available for the bypass diodes, both are based on the common SPICE approach for the modelling of diodes.

The ‘Simple’ model has no temperature dependence, no series resistance and no reverse breakdown. The current through the bypass diode (IB) is determined from:

IB={IS,B[exp(VBDNBVT)1],VBD>3NVTIS,B[1+exp(3NBVTVBDe)3],VBD3NVTI_B = \begin{cases} I_{S,B} \cdot \left[ \exp \left( \frac{V_{BD}}{N_B V_T} \right) - 1 \right], & V_{BD} > -3 \cdot N V_T \\ -I_{S,B} \cdot \left[ 1 + \exp \left( \frac{3 \cdot N_B V_T}{V_{BD} \cdot e} \right)^3 \right], & V_{BD} \le -3 \cdot N V_T \end{cases}

Where IS,B is the saturation current and NB is the diode ideality factor.

The ‘SPICE Level 1’ model enables the definition of RS,B which is an Ohmic resistor in series with the diode. It also enables the definition of a ‘knee-on’ reverse bias breakdown voltage BV at which point the diode current transitions towards flowing reverse bias breakdown ‘knee’ current IBV. Temperature dependence of the saturation current is achieved through the definition of a bandgap voltage (EG) and a temperature exponent XTI as shown in the follow equation:

Is(T)=Isexp((TTNOM1.0)EGNVT(T)+XTINln(TTNOM))I_s(T) = I_s \exp \left( \left( \frac{T}{T_{NOM}} - 1.0 \right) \cdot \frac{EG}{N V_T(T)} + \frac{XTI}{N} \cdot \ln \left( \frac{T}{T_{NOM}} \right) \right) VT(T)=kTqV_T(T) = \frac{kT}{q}

Note that bypass diodes in solar modules do not typically have reverse breakdown behaviour within the range of reverse voltage they would typically experience, and as such the value of BV can be set very high.

The figure below demonstrates the fitting of the diode model to a typical solar bypass diode.

Comparison between the simulation of a typical solar bypass diode with the full SPICE level 1 model (symbols) and the forward (right) and reverse (left) diode characteristics as reported on a datasheet (lines).

For details of how the cell model is parameterised and updated during a yield run, see:

SunSolve calculates the cell-to-cell mismatch at every time step of a yield simulation using the following procedure.

For each module:

  1. Determine the light-generated current JL in each solar cell from the ray tracing and cell collection efficiency.

  2. Determine power produced by each solar cell if they all operate at their own maximum power (solving the 1-diode model at the module temperature). The sum of those values is PnoMMP_{noMM}

  3. Determine the maximum power produced by the module when all cells are connected as per the module layout, including bypass diodes in parallel with the cell strings (solving the SPICE model of the module at the module temperature). That gives PMM.

  4. The absolute mismatch loss for that module is PnoMMPMMP_{noMM} - P_{MM}.

Then, for the unit system:

  1. the absolute cell-to-cell mismatch loss is the sum of the losses for each module: ΣPnoMMΣPMMΣP_{noMM} - ΣP_{MM}

  2. the relative cell-to-cell mismatch loss is (ΣPnoMMΣPMM)/ΣPnoMM(ΣP_{noMM} - ΣP_{MM}) / ΣP_{noMM}

The table below provides a summary of the module electronics models.

ParameterModelNotesReference
Cell current-voltage output characteristics1-diode equivalent circuit with Rs and RpThe de facto standard in the PV industry. See Equivalent circuit model for the SunSolve implementation.[Chin2015] [McIntosh2001]
Irradiation dependent shunt resistancePVsyst irradiation dependent shunt modelMainly this is intended for non-crystalline silicon devices. See Illumination dependent shunt resistance.[Mermoud2013] [Mermoud2014]
Module circuitDC SPICE circuitA full SPICE model of module is defined and solved.[SPICE3f5]
Diode modelLevel 1 SPICE modelBased on the SPICE 3f5 implementation from Berkley University[SPICE3f5]
Calculation of cell series resistanceSet of analytical equationsOnly applies to complex modules. See Determination of the series resistance.[Green1982]
Temperature dependence of current-voltage outputPVsyst modelSee Temperature dependence of electrical circuit.[Mermoud2014]