Illumination-Dependent Shunt Resistance in c-Si Module Models

In classical single-diode parameter extraction, the shunt resistance ($R_{sh}$) is often estimated from the slope of the I–V curve near short-circuit current ($I_{SC}$):

$$\frac{\Delta I}{\Delta V} \approx \frac{1}{R_{\text{sh}}}$$

For single crystalline silicon (c-Si) cells, this approach is generally valid.

However, for modules composed of many series-connected cells, this interpretation can be misleading.

Harder & Garcia (IEEE PVSC-52, 2024) performed detailed temperature- and irradiance-dependent characterization of a TOPCon c-Si module and demonstrated that the commonly observed illumination-dependent shunt resistance used in De Soto and PVsyst parameterizations does not correspond to a physical shunt mechanism in the module. Instead, it arises from cell mismatch and reverse-bias behaviour within the series string.

This technical note summarises their findings and implications for SunSolve modeling of c-Si modules.

---

What is observed in practice

When evaluating module flash measurements at multiple irradiance levels:

• The slope of the I–V curve between $I_{SC}$ and mid-range voltages:
  • Increases with irradiance.
  • Can be parameterised as an apparent shunt conductance.
• De Soto and PVsyst therefore introduce:
  • An irradiance-dependent Rsh term in module models.

This approach produces reasonable agreement with the measured near-$I_{SC}$ slope — but the physical interpretation is questionable.

---

Key findings from Harder & Garcia (2024)

1. The near-I_SC slope is dominated by cell mismatch

The authors show that the slope near $I_{SC}$ in a module is primarily caused by:

• Cell-to-cell current mismatch,
• Reverse-bias characteristics of weaker cells,
• Illumination inhomogeneity during flash testing,
• Interaction with bypass diodes.

Importantly:

• The I–V curve transitions sharply from this mismatch-dominated region into the exponential diode region.
• A true shunt would produce a smooth, continuous effect, including near the MPP.
• The measured curves show that the MPP region is largely unaffected by any strong shunt mechanism.

This indicates that the slope near $I_{SC}$ does not represent a physical shunt resistance in the equivalent circuit sense.

---

2️. Forcing the apparent shunt distorts other parameters

If the near-$I_{SC}$ slope is interpreted as $R_{sh}$:

• The extracted shunt resistance becomes artificially low.
• The model predicts excessive fill-factor loss.
• To compensate:
  • Ideality factors are reduced to unphysical values (e.g. < 1).
  • Temperature-dependent ideality adjustments (e.g. PVsyst’s μGamma) are introduced.

Harder & Garcia show that these compensations are unnecessary if the mismatch-induced slope is excluded from the shunt determination.

---

3️. Fixed, high R_sh produces better results

Using:

• A physically consistent ideality factor,
• Saturation currents following expected temperature dependence,
• A fixed (high) $R_{sh}$,
• A simple series resistance treatment,

the authors achieved:

• Better agreement with measured efficiencies,
• Improved temperature consistency,
• No need for temperature-dependent ideality factors.

The conclusion is that illumination-dependent shunt parameterization is not required to reproduce c-Si module behaviour.

---

Implications for SunSolve (c-Si modules)

For crystalline silicon modules:

• The region relevant to energy production is near the MPP, not near $I_{SC}$.
• Mismatch-driven slope behaviour near $I_{SC}$ has negligible impact on operating yield.
• Introducing irradiance-dependent $R_{sh}$ may:
  • Distort low-light predictions,
  • Bias temperature coefficients,
  • Create parameter instability across datasets.

Therefore, for c-Si modules:

• Shunt resistance should not be extracted from the slope of a module IV curve near $I_{SC}$.
• Parameter fitting should prioritise the MPP-relevant current range.
• Ideality factors should remain physically meaningful.
• Artificial compensating temperature terms should be avoided unless independently justified.

Note that SunSolve applies the equivalent circuit model on a per solar cell basis. There cells are then connected as per the module layout and the final IV curve solved with SPICE. As such, the effects that lead to the creation of the slope is reproduced within SunSolve.

---

Scope and technology considerations

This technical note applies specifically to:

• Crystalline silicon (c-Si) modules, including TOPCon.

For other technologies, the situation may differ.

In some non-silicon devices (e.g. thin-film, perovskite, tandem, or devices with known leakage mechanisms):

• True illumination-dependent leakage pathways may exist.
• Bulk or interface-related shunt mechanisms may couple with illumination.
• The shunt term may have stronger physical relevance.

Accordingly:

• The conclusions of Harder & Garcia should not be automatically generalised beyond c-Si modules.
• Technology-specific validation remains essential.

---

Key takeaway

For c-Si modules:

The apparent illumination-dependent shunt resistance derived from the slope near $I_{SC}$ is primarily a mismatch artifact — not a physical shunt mechanism affecting module power output.

Accurate and robust yield modeling is achieved by focusing on MPP-relevant behaviour and maintaining physically consistent diode and temperature parameters.